New USB 2.0 FPGA Module Announced by Opal Kelly » read source
The volume availability of its new XEM3050 module has been announced today by a leading producer of powerful FPGA USB 2.0 modules ideally suited for development engineering, prototyping, and OEM integration, Opal Kelly. The XEM3050, based on the 4,000,000-gate Xilinx Spartan-3 FPGA and high-transfer-rate USB 2.0, features on-board SDRAM, Flash, SSRAM, integrated power supplies, abundant I/O, and is controlled by Opal Kelly's FrontPanel software and API. The XEM3050 is being used by early adopters at leading engineering firms and universities as the "heart" of electronic product design, prototyping, and simulation. Along with dramatically accelerated time to market, it is eliminating months of engineering development time and expense.
The XEM3050 is used for turnkey device-to-computer integration for "logic-heavy" applications such as data acquisition, image capture and signal processing, and digital communication. The XEM3050 module includes, at no extra charge, Opal Kelly's FrontPanel software for interfacing "virtual" instruments, HDL simulation models for multiple platforms, and its complete Application Programmer's Interface (API) for several languages.
To develop a GPS receiver for Magellan Systems Japan that will be implemented as an ASIC in the final product, Radix20 Design Services, an ASIC design and EDA consulting firm, is using the XEM3050. Chief Engineer of Radix20 Design Services, Gil Herbeck, stated: "With the XEM3050, we are able to run simulations faster than real time, dramatically reducing the time required for design verification. For a typical 20-minute GPS simulation, a mid-range commercial Verilog simulator would take 260 hours and an expensive, high-end Verilog simulator would take 40 hours. Using the XEM3050, we are able to do 20 minutes of verification in just 13 minutes."
The XEM3050 is the most powerful module in the range of Opal Kelly's FPGA USB 2.0 modules. Smaller than a credit card, the XEM3050 is packed with features, such as:
* 64-MB SDRAM using two completely independent 32-MB SDRAMs; * 8-Mb SPI Serial Flash for non-volatile storage with a separate Xilinx Platform Flash for FPGA configuration data; * 512k X 18 high-performance Synchronous SRAM; * Two high-efficiency switching power supplies to reduce design burden and generate clean, stable power to the FPGA; * Opal Kelly's unique FrontPanel software at no charge, which handles all the interaction between the customer's software and the customer's FPGA design; * With a variety of languages including Ruby, C#, C++, C, Python and Java), it features multi-platform API (available for Mac OS X, Microsoft Windows XP/Vista, and Linux FedoraCore 7; * DLL support for a variety of third-party tools including Matlab and LabVIEW.
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